View PFF3000-12-069RD_9045467.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

pff3000 - 12 - 069rd is a 3 kw dc/dc front - end converter that provides a main output 12.5 vdc from 40 - 72 vdc bus voltages to power intermediate bus ar chitectures (iba) in high - performance and high - reliability servers, routers, and network switches. features include very high efficiency, high reliability, low output voltage noise, and excellent dynamic response to load / input changes. ? best - in - class, platinum equivalent efficiency ? input voltage range: 40 - 72 vdc ? up to 3 kw output power - 244 a output current ? hot - plug capable ? parallel operation with active analog current sharing ? 2 status leds: dc input ok and warning / fault signaling ? h igh density design: 30.5 w/in 3 ? form factor: 69 x 42 x 555 mm ? full digital controls for improved performance ? rohs compliant ? reverse polarity, over temperature, output overvoltage, and overcurrent protections ? i2c communication interface for control, programming, and monitoring with pmbus? protocol ? high performance servers ? routers ? switches disclaimer : pmbus is a registered trademark of smif, inc .
2 pff 3000 - 12 - 069r d tech.support@psbel.com pff 3000 - 12 - 069 r d o ption c ode product family power level dash v1 output dash width airflow input blank: standard model pff front - ends 3000 w 12 .5 v 69 mm r : reversed 1 d: d c 1 front to rear pff3000 - 12 - 069rd power supply is a fully digital controlled, highly efficient front - end converter. it incorporates state - of - the - art technology and uses an interleaved forward converter topology with active clamp and synchronous rectification to reduce component stresses, thus providing increased system reliability a nd very high efficiency. with a wide dc input voltage range and minimal linear output power derating with ambient temperature, pff3000 - 12 - 069rd maximizes power availability in demanding server, switch, and router applications. the frontend is fan cooled an d ideally suited for server integration with a matching airflow path. active or - ing devices on the main output ensure no reverse load current and render the supply ideally suited for operation in redundant power systems. the standby output (12v/2a) provide s power to external power distribution and management controllers. its protection with an active or - ing device provides for maximum reliability. status information is provided with two front - panel leds. in addition, the power supply can be controlled via i 2c bus. this allows full monitoring of the supply, including input and output voltage, current, power, and inside temperatures. cooling is manage d by a fan controlled by the dsp controller. the fan speed is adjusted automatically depending on the actual po wer demand and supply temperature and can be overridden through the i2c bus. figure 1 . pff 3000 - 12 - 0 069rd block diagram
pff 3000 - 12 - 069r d 3 asia - pacific +86 755 298 85888 europe, middle east +353 61 225 977 north america +1 408 785 5200 ? 201 8 bel power solutions & protection bcd.00886_011 stresses in excess of the absolute maximum ratings may cause performance degradation, adversely affect long - term reliability, and cause permanent damage to the supply. parameter conditions / description min max units vi maxc maximum input continuous 75 v d c general condition: t a = 0 45 c unless otherwise noted. parameter description / condition min nom max unit v i start minimum operating input voltage communication available, dsp running 3 5 v dc v i nom nominal input voltage 53 v dc v i input voltage normal operation (from v i min to v i max ) 40 72 v dc i i input current v i > v i min 85 a i i pk inrush current limitation from v i min to v i max , t a = 25c 100 a v i on _uv turn - on input voltage low ramping up 42.5 43.5 v dc v i off _uv turn - off input voltage low ramping down 38.0 39.5 v dc v i on_ov turn - on input voltage high ramping down 68.5 69.5 v dc v i off_ov turn - off input voltage high ramping up 72.0 75 .0 v dc efficiency (fan power not included) v i nom , 0.2 ? i 1 nom , v 1 nom , t a = 25 c 90.0 93.8 % v i nom , 0.5 ? i 1 nom , v 1 nom , t a = 25 c 94.0 95 % v i nom , i 1 nom , v 1 nom , t a = 25 c 91.0 93 % 4.1 input fuse fast - acting 100 a input fuse in series on minus dc rail inside the psu protects against severe defects. the fuse is not accessible from the outside and is not therefore a serviceable part. 4.2 inrush current & reverse polarity protection internal bulk capacitors will be charged through ntc resistors connected from bulk cap minus pin to the dc rail minus, thus limiting the inrush current. after the inrush phase, ntc resistors are then shorted with mosfets connected in parallel. inrush contr ol is managed by the digital controller (dsp). parallel connected mosfets in series to the dc minus rail input act as a reverse polarity blocking element (fig. 1). in case of a short at the input voltage or input reverse polarity, these mosfets will open and prevent the bulk caps to be discharged via the input. reverse polarity control is managed by a fast - acting analog circuit. note: i n order to keep max inrush current below i i max, it is not recommended to repeat plug - in/ - out operations within 20 s.
4 pff 3000 - 12 - 069r d tech.support@psbel.com 4.3 input under - voltage if input voltage v i is below the input under - voltage lockout threshold v i min , main output will be inhibited. once the input voltage returns within the normal operating voltage range, main output voltage will be enabled again and converter returns into normal operation. 4.4 efficiency high efficiency is achieved by using state - of - the - art silicon power devices, thus minimizing conduction and switching losses by an optimized design and layout. synchronous rectifiers on the output stage reduce losses in the high current output path. fan speed is digitally controlled in order to keep all components below critical operating temperature. figure 2 . efficiency vs. load c urrent 88 89 90 91 92 93 94 95 96 0 500 1000 1500 2000 2500 3000 efficiency [%] po [w] vi = 53vac, fan internal, standby proportional loaded vi =53vac, fan external, standby unloaded platinum
pff 3000 - 12 - 069r d 5 asia - pacific +86 755 298 85888 europe, middle east +353 61 225 977 north america +1 408 785 5200 ? 201 8 bel power solutions & protection bcd.00886_011 parameter description / condition min nom max unit main output v 1 v 1 nom nominal main output voltage 0.5 ? i 1 nom , t a = 25 c 12.5 v dc v 1 set main output voltage set - point accuracy 0.5 ? i 1 nom , t a = 25 c - 0.5 +0.5 % v 1 nom dv 1 tot total regulation v i min to v i max , 0 to 100% i 1 nom , t a min to t a max - 1.0 +1.0 % v 1 nom p 1 nom nominal main output power v 1 = v 1 nom 1.0% v 1 nom 3000 w i 1 nom nominal main output current v 1 = v 1 nom 1.0% v 1 nom 244 a i v1 lim see table protection i v1 ol short time over load current v 1 = 12.3 vdc, t a min to t a max , maximum duration 20 ms (see section 5.2 and 6 ) 280 a i v1 ol lim current limit during short time overload v 1 see table protection v 1 pp main output ripple voltage v 1 nom , i 1 nom , 20 mhz bw 160 mv pp dv 1 load load regulation v i nom , 0 C 100% i 1 nom 170 mv dv 1 droop droop 0 C 100% i 1 nom 0.7 mv/a dv 1 line line regulation v i = v i min v i max 0 mv di share current sharing accuracy deviation i 1 tot / n, i 1 > 30% i 1 nom - 5 +5 % dv 1dyn dynamic load regulation i 1 = 10 %...50% i 1 nom , i 1 tot = i 1 + i 1 , i 1 = 50 % i 1 nom , di o / dt = 1 a/ s, recovery within 1% of v 1 nom - 0.6 +0.6 v t 1rec recovery time 1 ms t v1_pwr_on start - up time from dc input v 1 = 10.8 v dc see table on/ off signal timings t v1 rise rise time (monotonic) v 1 = 10%...90% v 1 nom , 50% i 1 nom 4.5 ms t v1_holdup hold - up time 0.5 ? i 1 , v i = v i nom 2 ms c load capacitive loading t a = 25 c 10000 f standby output v sb v sb nom nominal standby output voltage 0.5 ? i sb nom , t a = 25 c 12.00 v dc v sb set standby output set - point accuracy 0.5 ? i sb nom , t a = 25 c - 1. 5 + 1. 5 % v sb nom dv sb tot total regulation v i min to v i max , 0 to 100% i sb nom , t a min to t a max - 1. 5 +1. 5 % v sb nom p sb nom nominal standby output power v sb = v sb nom 0.5% v sb nom 24 w i sb nom nominal standby output current v sb = v sb nom 0.5% v sb nom 2 a v sb pp standby output ripple voltage v sb nom , i sb nom , 20 mhz bw 120 mv pp i vs b lim current limit see table protection t vsb lim over load current limit time on v sb time to hit hiccup when in over current see table protection dv sb load regulation 0 C 100% i sb nom 22 0 mv droop 0 C 100% i sb nom 11 0 mv/a dv sbdyn dynamic load regulation i sb = 5%...50% i sb nom , i sb tot = i 1 + i 1 , i sb = 50 % i sb nom , di o / dt = 1 a/ s, recovery within 1% of v sb nom - 0.6 +0.6 v t sbrec recovery time 5 ms t vsb_pwr_on start - up time from dc input v sb = 90% v sb nom see table on/ off signal timings t vsb rise rise time (monotonic) v sb = 10%...90% v sb nom 0.1 ms t vsb_holdup hold - up time i sb =02a, v i > 48v 5 260 ms c load capacitive loading t a = 25 c 1000 f general condition: t a = 045 c unless otherwise noted.
6 pff 3000 - 12 - 069r d tech.support@psbel.com 5.1 output voltage ripple the internal output capacitance at the power supply output (behind or - ing element) is minimized to prevent disturbances during hot plug. in order to provide low output ripple voltage in the application, external capacitors should be added close to the power supply output. the setup of figure 3 has been used to evaluate suitable capacitor types. the capacitor combinations of table 1 and table 2 should be used to reduce the output ripple vo ltage. the ripple voltage is measured with 20 mhz bwl, close to the external capacitors. figure 3 . output ripple test setup note: care must be taken when using ceramic capacitors with a total capacitance of 1 f to 50 f on output v1, due to their high quality factor the output ripple voltage may be increased in certain frequency ranges due to resonance effects. external capacitor v1 dv1max unit 2pcs 47f/16v/x5r/1210 160 mvpp 1pcs 1000f/16v/low esr aluminum/?10x20 160 mvpp 1pcs 270f/16v/conductive polymer/?8x12 160 mvpp 2pcs 47f/16v/x5r/1210 plus 1pcs 270f conductive polymer or 1pcs 1000f low esr alcap 90 mvpp external capacitor vsb dvsbmax unit 1pcs 270f/16v/conductive polymer/?8x12 120 mvpp table 1 . suitable capacitors for v1 table 2 . suitable capacitors for vsb the output ripple voltage on vsb is influenced by the main output v1. evaluating vsb output ripple must be done when maximum load is applied to v1.
pff 3000 - 12 - 069r d 7 asia - pacific +86 755 298 85888 europe, middle east +353 61 225 977 north america +1 408 785 5200 ? 201 8 bel power solutions & protection bcd.00886_011 5.2 output isolation main and standby outputs and all signals are galvanic isolated from the chassis and protective earth connection, although the applied voltage v i has not to exceed 75 v pk in order to prevent catastrophic damage to the psu. figure 4 . turn - on at v i = v i - nom , i 1 = i 1 - nom (2 ms/div) ch3 (blue): v 1 (2 v/div), ch4 (green): i 1 (100 a/div) figure 5 . turn - off at v i = v i - nom , i 1 = i 1 - nom (2 ms/div) ch3 (blue): v 1 (2 v/div), ch4 (green): i 1 (100 a/div) figure 6 . load transient on v 1 , 12 a to 122 a (1 ms/div) ch 3 (blue): v 1 (0.5 v/ div), ch4 (green): i 1 (100 a/div) figure 7 . load transient on v 1 , 122 a to 12 a (1 ms/div) ch3 (blue): v 1 (0.5 v/div), ch4 (green): i 1 (100 a/div) figure 8 . lo ad transient on v 1 , 122 a to 244 a (1 ms/div) ch3 (blue): v 1 (0.5 v/div), ch4 (green): i 1 (100 a/div) figure 9 . load transient on v 1 , 24 4 a to 122 a (1 ms/div) ch3 (blue): v 1 (0.5 v/div), ch3 (green): i 1 (100 a/div) figure 10 . inrush current, v i = v i - nom , i 1 = i 1 - nom (200 ms/div) ch3 (blue): v in ( 20 v/div), ch 4 (green): i in (20 a/div) figure 11 . short circuit on main output (500 s/div) ch3 (blue): v 1 (2 v/div), ch 4 (green): i 1 (100 a/div)
8 pff 3000 - 12 - 069r d tech.support@psbel.com parameter description / condition min nom max unit t a < 45c t a = 60 c 1 i v1 ol lim current limit during short time overload v 1 i v 1 sc max short circuit current v 1 v 1 < 3 v 350 2 1 see figure 26 for linear power derating > 45 c 2 limit set dont include effects of main output capacitive discharge. 6.1 automatic retry any fault condition on main output v 1 will shut down the main output and attempt to recover from the fault 5 times before latching off. the time between each restart attempt is 10 s. the fault latch and fault counter can be reset by disconnecting the input voltage or by toggling the pson_l in put. if the unit operates for more than 10 min with no failure, then the failure counter will be reset automatically. a failure on the standby output v sb will shut down both outputs, whereas a failure on main output v1 will only shut down this output, whil e v sb will continue to operate and communicate. 6.2 overvoltage protection the psu provides a fixed threshold overvoltage (ov) protection, implemented with a hardware comparator. once an overvoltage (ov) condition has been triggered, the supply will shut down and latch the fault condition. 6.3 undervoltage detection as both main and standby outputs are monitored, leds and the pwok_l pin will warn if v 1 or v sb exceed 7% of its nominal voltage. output undervoltage protection is provided on both outputs. when either v1 or vsb falls below 93% of its nominal voltage, the output is inhibited.
pff 3000 - 12 - 069r d 9 asia - pacific +86 755 298 85888 europe, middle east +353 61 225 977 north america +1 408 785 5200 ? 201 8 bel power solutions & protection bcd.00886_011 6.4 output over - current protection main output two different over current protection features are implemented on the main output. the 1 st protection - a static over current protection will shut down the output, if the output current does exceed i v1 lim for more than 20 ms. if the output current is increased slowly this protection will shut down the supply. the main output current limitation level i v1 lim will decrease if the ambient (inlet) temperature increases beyond 45 c (see figure 26 ). the 2 nd protection - a substantially rectangular output characteristic controlled by a software feedback loop. this protects the power supply and system during the 20 ms blanking time of the static over current protection. if the output current is rising fast and reaches i v1 ol lim , the supply will immediately reduce its output voltage to prevent the output current from exceeding i v1 ol lim . when the output current is r educed below i v1 ol lim , the output voltage will return to its nominal value. figure 12 . current limitation on main output standby output on the standby output a hiccup type over current protection is implemented. this protection will shut down the standby output immediately when standby current reaches or exceeds i vsb lim . after an off - time of 1s the output automatically tries to restart. if the overload condition is removed the output voltage will reach again its nominal value v sb = v sb nom 1%. at continuous overload condition the output will repeatedly trying to restart with 1s intervals. figure 13 . current limitation on standby output
10 pff 3000 - 12 - 069r d tech.support@psbel.com parameter description / condition min nom max unit v i mon input voltage v i min v i v i max - 2.5 +2.5 % i i mon input current i i > 25 a i i 25 a - 5.0 - 1.25 +5.0 +1.25 % a p i mon input power p i > 16 00 w p i 16 00 w - 5.0 - 8 0 +5.0 +8 0 % w v 1 mon main output voltage - 2 +2 % i 1 mon main output current i 1 > 134 a i 1 134 a - 2.0 - 2.68 +2.0 +2.68 % a p o 1 mon main o utput power p o 1 > 7 00 w p o 1 7 00 w - 5 - 35 +5 +35 % w v sb mon standby voltage - 2 +2 % i sb mon standby current - 0.2 0.2 a p sb mon standby output power - 2.4 2.4 w parameter description / condition min nom max unit pskill / pskill_in / pson_l inputs v il input low level voltage - 0.2 +0.8 v v ih input high level voltage 2.0 3.6 v i il, h maximum input sink or source current 0 1 ma r pu pskill (_in) internal pull - up resistor on pskill 10 k ? r pupson_l internal pull - up resistor on pson_l 10 k ? pwok_l output v ol output level voltage i sink < 4 ma - 0.2 0.4 v v pu pwok_l external pull - up voltage 12 v r pu pwok_l recommended external pull - up resistor on pwok_l at v pu pwok_l = 3.3 v 10 k ? low level output all outputs are turned on and within regulation high level output in standby mode or v 1 / v sb have triggered a fault condition inok_l output v ol output low level voltage i sink < 4 ma - 0.2 0.4 v v puinok_l external pull - up voltage 12 v r pu inok_l recommended external pull - up resistor on inok_l at v pu inok_l = 3.3 v 10 k ? low level output input voltage is within range for psu to operate high level output input voltage is not within range for psu to operate smb_aler t_l output v ol output low level voltage i sink < 4 ma - 0.2 0.4 v v pu smalt_l external pull - up voltage 12 v r pu smalt_l recommended external pull - up resistor on smb_aler t_l at v pu smalt_l = 3.3 v 10 k ? low level output psu is in warning or failure condition high level output psu is ok electrical characteristics
pff 3000 - 12 - 069r d 11 asia - pacific +86 755 298 85888 europe, middle east +353 61 225 977 north america +1 408 785 5200 ? 201 8 bel power solutions & protection bcd.00886_011 8.2 interfacing with signals a 15 v zener diode is added on all signal pins versus signal ground sgnd to protect internal circuits from negative and high positive voltage. signal pins of several supplies running in parallel can be interconnected directly. a supply having no input power will not affect the signals of other psus running in parallel. the current share bus pin (ishr_bus) must be interconnected without any additional components; as protection element, a 15 v zener diode is connected to the signal reference sgnd. the share bus is disconnected (analog switch) from internal circuits when the power supply is switched off. 8.3 led status - front leds the psu has two front leds showing its status: dc input led is green colored and indicates dc power on / off, dc output led is bi - colored green and yellow and shows dc output ok or a warning/fault status as listed in table 1 . operating condition led signaling in: dc input led dc line within range solid green dc line uv / ov condition off bootload blinking green: off ( 1:1 ) out: dc output led normal operation solid green pskill _in _l - left open blinking yellow ( 1:1 ) pson_l - high , pskill_l - high pmbus? command operation dc line uv / ov condition solid yellow v1 or vsb out of regulation over temperature shutdown output over voltage shutdown (v 1 or v sb ) output under voltage shutdown (v 1 or v sb ) output over current shutdown (v 1 or v sb ) both fans blocked over temperature warning blinking yellow /green ( 2 : 1 ) minor fan regulation error (> 5 %, < 15 %) blinking yellow /green (1:1) or one of the fans blocked bootload blinking green ( 1:1 ) table 3 . led status 8.4 present_l present_l is a trailing pin within the connector and will contact only once all other connector contacts. this active - low pin is used to indicate to a power distribution unit controller that a supply is plugged in. maximum sink current on present_l pin should not exceed 10 ma. figure 14 . present_l signal pin
12 pff 3000 - 12 - 069r d tech.support@psbel.com 8.5 pskill_l / pskill _in _l input pskill_l input is an active - low trailing pin in the output connector and is used to disconnect the main output as soon as the power supply is being pulled out. this pin should be connected to sgnd in the power distribution unit. standby output will remain on, regardless of the pskill_l input state. pskill _in _l input is an active - low signal pin in the input connector and is used to disconnect the main output as soon as the input connector is plugged out. this pin should be connected to sgnd on the input connector mating part. standby output will remain on, regardless of the pskill_l input state. 8.6 d c turn - on / drop - outs / inok_l the inok_l signal indicates whether the dc input voltage is within the o perating range and the power supply can turn on. the power supply will automatically turn - on when connected to the dc line within the operating voltage range under the condition that the pson_l signal is pulled low. inok_l is an active low open collector o utput that requires an external pull - up voltage to maximum 12.0 v. 8.7 pson_l input pson_l is an internally pulled - up (3.3 v) input signal to enable / disable the main output v 1 . this active - low pin is also used to clear any latched fault condition. timing parameters are listed in table 2. 8.8 pwok_l signal pwok_l is an open collector output that requires an external pull - up voltage to maximum 12 v, indicating whether both v 1 and v sb outputs are within regulation. this pin is active - low; timing parameters are listed in table 2. 8.9 signal timing operating condition min max unit t v1_rise see table output parameter t vsb_rise see table output parameter t inok_o n inok_ l delay at dropout 0 700 ms t inok_o n _pwr_on inok_ l delay at coldstart 500 1800 ms t inok_to_vsb_rise inok_l to v sb delay 1 5 ms t vsb_pwr_on v in to v sb de lay 52 0 1805 ms t v1_pwr_on v in to v 1 de lay 700 3000 ms t pwok_on v 1 in regulation to pwok_l 280 320 ms t v1_fall monotonic t vsb_fall monotonic t inok_off inok_l delay 0 1.8 ms t inok_warn inok_l to v 1 out of regulation (0.5 i 1 ), v i > 48v 1.0 ms t v1_holdup see table output parameter t vsb_holdup see table output parameter t pwok_off v 1 out of regulation to pwok_l 0 5 ms t pson_on pson_l to v 1 in regulation 150 170 ms t pson_off pson_l to v 1 out of regulation 0 5 ms t pskill(_in)_on pskill(_in)_l to v 1 in regulation 150 170 ms t pskill(_in)_off pskill(_in)_l to v 1 out of regulation 0 5 ms table 4 . on - /off - signal timings
pff 3000 - 12 - 069r d 13 asia - pacific +86 755 298 85888 europe, middle east +353 61 225 977 north america +1 408 785 5200 ? 201 8 bel power solutions & protection bcd.00886_011 figure 15 . power o n delay, rise time and signaling figure 16 . power removed holdup, fall time and signaling figure 17 . turn on delay, rise time and signaling figure 18 . turn off, fall time and signaling figure 19 . dropout and signaling
14 pff 3000 - 12 - 069r d tech.support@psbel.com no. of paralleled psus max available power on main output without redundancy max available power on main output with n+1 redundancy max available power on standby output 1 3000 w - 24 w 2 5850 w 3000 w 24 w 3 8700 w 5850 w 24 w 4 11550 w 8700 w 24 w 5 14400 w 11550 w 24 w 6 17250 w 14400 w 24 w table 5 . available power when multiple psus are operating 8.10 current share the psu has an active current share scheme implemented for main output v 1 . ish_bus current share pins of all units in parallel need to be interconnected in order to activate the sharing function. if a supply has an internal fault or is not turned on, i t wil l disconnect its ishr_bus pin f r o m the share bus: this will prevent dragging the output down (or up) in such cases. master / slave current share function implemented by the controller uses an analog bus: the power supply providing the larges t current among the group is automatically the mas ter. the other supplies will operate as slaves and increase their output current to a value close to the master by slightly increasing their output voltage. the output voltage inc rease is limited to +250 mv. standby output uses an analog passive current - sh are method (droop - output voltage characteristic). maximum available main and stand - by power in (non) - redundant topology is listed in table 5 . 8.11 sense inputs main output sense lines have been implemented in order to compensate voltage drops on the load wires: a maximum voltage drop of 200 mv on the positive rail and 100 mv on the pgnd rail is allowed. if sense inputs are not connected (open), main output voltage will rise by 250 mv; therefore, if sense inputs are not used, they should be connected to the power output and sgnd, close to the power supply connector. the sense inputs are protected against short circuit and reverse polarity. if the sense l ines are shorted (or reverse polarized) at start - up condition, then v 1 will be regulated by 500 mv higher than the reference voltage for 100 ms and later the psu will shut down reporting a sense fault error. if the sense lines are shorted (or reverse po larized) during operation, then the unit will shut down immediately. 8.12 i2c / pmbus? communication the psu is a communication slave device only: it never initiates messages on the i2c / smbus. it recognizes any time start / stop bus conditions and the interface driver in the supply is referred to the sgnd. communication bus voltage and timing are defined by: ? 100 k ? internal pull - up resistors ? sda / scl ios must be pull - up externally to 3.3 0.3 v ? pull - up resistor should be 2 k ? to 5 k ? to ensure smbus compliant signal rise times ? full smbus clock speed of 100 kbps ? clock stretching limited to 1 ms ? scl low time - out of > 25 ms with recovery time within 10 ms figure 20 . physical layer of communication interface
pff 3000 - 12 - 069r d 15 asia - pacific +86 755 298 85888 europe, middle east +353 61 225 977 north america +1 408 785 5200 ? 201 8 bel power solutions & protection bcd.00886_011 parameter condition min max unit v il input low voltage - 0.2 0.4 v v ih input high voltage 2.1 3.6 v v hys input hysteresis 0.15 v v ol output low voltage 4 ma sink current 0 0.4 v t r rise time for sda and scl 20 + r b c b 1 300 ns t of output fall time v ihmin ? v ilmax 10 pf < c b 1 < 400 pf 20 + r b c b 1 250 ns i i input current scl / sda 0.1 v dd < v i < 0.9 v dd - 10 10 a c i capacitance for each scl / sda 10 pf f scl scl clock frequency 0 100 khz r pu external pull - up resistor 1000 ns / c b 1 ? t hdsta hold time (repeated) start f scl 100 khz 4.0 s t low low period of the scl clock f scl 100 khz 4.7 s t high high period of the scl clock f scl 100 khz 4.0 s t susta setup time for a repeated start f scl 100 khz 4.7 s t hddat data hold time f scl 100 khz 0 3.45 s t sudat data setup time f scl 100 khz 250 s t susto setup time for stop condition f scl 100 khz 4.0 s t buf bus free time between stop and start f scl 100 khz 4.7 s eeprom_wp v il input low voltage - 0.2 0.4 v v ih input high voltage 2.1 3.6 v i i input sink or source current - 1 1 ma r pu internal pull - up resistor to 3.3v 10k ? 1 cb = bus line capacitance in pf, typically in the range of 10 pf400 pf, rb = 100 ? table 6 . i2c / smbus specification figure 21 . i 2 c / smbus timing smb_aler t_l signal indicates that the power supply is experiencing a problem that the system agent should investigate: this is a logical or of the shutdown and warning events. communication to the dsp will be possible as long as the input voltage is provided. if no input voltage is present, communication to the unit is possible as long as it is connected to a live v sb output (e.g. provided by a redundant unit); if only v 1 is provided, communication is not possible. t r t low t high t low t hdsta t susta t hddat t sudat t susto t buf t of sda scl
16 pff 3000 - 12 - 069r d tech.support@psbel.com 8.13 address the unit supports the pmbus? communication protocol with a fixed address at 0x20 . the eeprom is at fixed address = 0xa0 . 8.14 controller access the controller and the eeprom in the power supply share the same i2c bus physical layer (see figure 23). in order to write to the eeprom, the write protection needs to be disabled by setting eeprom_wp input correctly. eeprom_wp=high: write disabled; eeprom_wp=low: write enabled. figure 22 . i 2 c bus to controller and eeprom 8.15 eeprom protocol the eeprom follows the industry communication protocols used for this type of device. even though page write / read commands are defined, it is recommended to use the single byt e write / read commands. write the write command follows the smbus 1.1 write byte protocol. after the device address with the write bit cleared a first byte with the data address to write to is sent followed by the data byte and the stop condition. a new start condition on the bus should only occur after 5ms of the last stop condition to allow the eeprom to write the data into its memory. read the read command follows the smbus 1.1 read byte protocol. after the device address with the write bit cleared the data address byte is sent followed by a repeated start, the device address and the read bit set. the eeprom will respond with the data byte at the specified location. s a d d r e s s w a d a t a a d d r e s s a d a t a a p d a t a n a p s a d d r e s s w a d a t a a d d r e s s a s a d d r e s s r a
pff 3000 - 12 - 069r d 17 asia - pacific +86 755 298 85888 europe, middle east +353 61 225 977 north america +1 408 785 5200 ? 201 8 bel power solutions & protection bcd.00886_011 8.16 pmbus? protocol the power management bus ( pmbus?) is an open standard protocol that defines means of communicating with power conversion and other devices. for more information, please see the system management interface forum web site at: www.powersig.org . pmbus? c ommand codes are not register addresses. they describe a specific command to be execu ted. pff3000 - 12 - 069rd supply supports the following basic command structures: ? clock stretching limited to 1 ms ? scl low time - out of >25 ms with recovery within 10 ms ? recognized any time start/stop bus conditions write the write protocol is the smbus 1.1 write byte/word protocol. note that the write protocol may end after the command byte or after the first data byte (byte command) or then after sending 2 data bytes (word command). in addition, block write commands are supported with a total maximum length of 255 bytes. see pff 3000 - 12 - 069ra pmbus ? communication manual bca.00070 for further information . read the read protocol is the smbus 1.1 read byte/word protocol. note that the read protocol may request a single byte or word. in addition, block read commands are supported with a total maximum length of 255 bytes. see pf f 3000 - 12 - 069r d pmbus ? communication manual bca.00216 for further information. s a d d r e s s w a c o m m a n d a d a t a l o w b y t e 1 ) a d a t a h i g h b y t e 1 ) a p 1 ) o p t i o n a l s a d d r e s s w a c o m m a n d a b y t e 1 a b y t e n a p b y t e c o u n t a s a d d r e s s w a c o m m a n d a d a t a ( l o w ) b y t e a s a d d r e s s r a d a t a h i g h b y t e 1 ) n a p 1 ) o p t i o n a l s a d d r e s s w a c o m m a n d a b y t e 1 a s a d d r e s s r a b y t e n n a p b y t e c o u n t a
18 pff 3000 - 12 - 069r d tech.support@psbel.com 8.17 graphical user interface bel power solutions provides its i2c utility: a windows? xp / vista / win7 compatible graphical user interface (gui), allowin g pff3000 - 12 - 069rd programming and monitoring. this utility can be downloaded at bel fuse.com/ power - solutions and supports both the psi and pmbus? protocols. the gui allows automatic finding of connected units to the communication bus and will show them in the navigation tree. in, the monitoring view the powe r supply can be controlled and monitored. figure 23 . monitoring dialog of the i2c utility (example) in order to achieve best cooling results, sufficient airflow through the supply must be ensured; airflow shall not be blocked or obstructed by placing large objects close to the output connector at the rear of the supply. pff3000 - 12 - 069rd is provided with a front - to - rear airflow, thus meaning the air enters through the power supply handle sid e (front) and leaves at the rear side. pff3000 - 12 - 069rd has been designed for horizontal operation. the internal fan is controlled by a microprocessor: fan rpm is then adjusted to provide optimal cooling air and is a function of output power, inlet and int ernal mosfets temperature. figure 24 . airflow direction
pff 3000 - 12 - 069r d 19 asia - pacific +86 755 298 85888 europe, middle east +353 61 225 977 north america +1 408 785 5200 ? 201 8 bel power solutions & protection bcd.00886_011 parameter description / condition criterion esd contact discharge iec / en 61000 - 4 - 2, 8 kv, 25 + 25 discharges per test point (metallic case, leds, connector body) a esd air discharge iec / en 61000 - 4 - 2, 15 kv, 25 + 25 discharges per test point (non - metallic user accessible surfaces) a radiated electromagnetic field iec / en 61000 - 4 - 3, 10 v/m, 1 khz / 80% amplitude modulation, 1s pulse modulation, 10 khz2ghz a burst iec / en 61000 - 4 - 4, level 3, dc port 1kv, 1 minute a surge iec / en 61000 - 4 - 5 line to earth: level 3, 1kv line to line: level 2, 1kv a rf conducted immunity iec / en 61000 - 4 - 6, level 3, 10 v rms , cw, 0.1 80 mhz a parameter description / condition criterion conducted emission en55022 / cispr 22: 0.15 30 mhz, qp and avg, single unit en55022 / cispr 22: 0.15 30 mhz, qp and avg, 2 units in rack system class a radiated emission en55022 / cispr 22: 30 mhz 1 ghz, qp, single unit en55022 / cispr 22: 30 mhz 1 ghz, qp, 2 units in rack system class a acoustical noise sound power statistical declaration (iso 9296, iso 7779, is9295) @ 50 % load 60 dba figure 25 . fan speed vs. main output load figure 26 . thermal power derating 10.1 immunity note: most of the immunity requirements are derived f rom en 55024:1998/a2:2003. 10.2 emission 0 750 1500 2250 3000 0 12 24 36 48 60 main output power [w] ambient temperature [ c]
20 pff 3000 - 12 - 069r d tech.support@psbel.com parameter description / condition criterion agency approvals ul 60950 - 1 second edition can / csa - c22.2 no. 60950 - 1 - 07 second edition iec 60950 - 1:2005 en 60950 - 1:2006 approved by independent body (see ce declaration) isolation strength input (dcin+ / dcin - ) to case (pe) basic input (dcin+ / dcin - ) to output basic output to case (pe) functional creepage / clearance primary (dcin+ / dcin - ) to protective earth (pe) according to safety standard primary to secondary electrical strength test input to case according to safety standard input to output output and signals to case parameter description / condition min nom max unit t a ambient temperature v i min to v i max , i 1 nom , i sb nom at 4000 m 0 +40 * c v i min to v i max , i 1 nom , i sb nom at 1800 m 0 +45 c t aext extended temperature range derated output +45 +55 c t s storage temperature non - operational - 40 +70 c altitude operational, above sea level - 4000 m relative humidity operational: t a = 40 c 7 85 % non - operational 5 93 % n a audible noise v i nom , 50 % i o nom , t a = 25 c at by - stander position 60 dba cooling system back pressure 0.5 in h 2 0 shock iec60068 - 2 - 27 operational: 11ms, half - sine non - operational: 11ms, half - sine 7 30 g pk vibration iec60068 - 2 - 27 operational: swept - sine, 5 - 500 - 5 hz non - operational: swept - sine, 5 - 500 - 5 hz random, 10 - 500 hz 1 4 3.5 gpk fall test iec60068 - 2 - 32 edge drop, corner drop, topple 1 m note: * system airflow will assist the psu airflow parameter description / condition min nom max unit dimensions width 69 mm height 42 mm depth 555 mm m weight 2.66 kg maximum electric strength testing is performed in factory according to iec / en 60950 and ul 60950. input - to - output electric strength tests should not be repeated in the field. bel power solutions will not honour any warranty claims resulting from electric strength field tests.
pff 3000 - 12 - 069r d 21 asia - pacific +86 755 298 85888 europe, middle east +353 61 225 977 north america +1 408 785 5200 ? 201 8 bel power solutions & protection bcd.00886_011 note: a 3d step file of the power supply casing is available on request. figure 27 . iso front and rear view figure 28 . front and rear view figure 29 . top view
22 pff 3000 - 12 - 069r d tech.support@psbel.com figure 30 . front and rear view pin name description input power in1 dcin - i nput voltage negative in2 dcin+ input voltage positive input signals aux1 reserved aux2 reserved aux3 pskill_in_l input connector power supply kill aux4 sgnd signal ground table 7 . input connector pinout input output in1 aux1 aux2 in2 aux3 aux4 s1 s2 s3 s4 p1 p2 p3 p4 p5 d1 d2 d3 d4 d5 c1 c2 c3 c4 c5 b1 b2 b3 b4 b5 a1 a2 a3 a4 a5 connector: anderson power sbs75xprblk - bk counterpart: housing: anderson power sbs75xblk power pins in1/2 (awg6): anderson power 1339g2 sockets aux1/2 (awg24 - 20): anderson power pm16s2024s32 connector: amphenol/ fci 51939 - 768lf counterpart: amphenol/ fci 51915 - 401lf a1 and a2 are trailing pins (short pins) for main output pins (s1 - s 4), see section 14 14.1 input connector pinout s2 s3 s4 s1
pff 3000 - 12 - 069r d 23 asia - pacific +86 755 298 85888 europe, middle east +353 61 225 977 north america +1 408 785 5200 ? 201 8 bel power solutions & protection bcd.00886_011 output s1, s2 pgnd +12 vdc main output ground s3, s4 v1 +12 vdc main output pe p1 protective earth p2 empty - p3 protective earth p4 empty - p5 protective earth output signals a1 pskill_l power supply kill (trailing pin): active low b1 pwok_l power ok signal output: active low c1 inok_l input ok signal: active low d1 pson_l power supply on input: active low a2 present_l power supply present (trailing pin): active low b2 sgnd signal ground * (return) c2 sgnd signal ground * (return) d2 sgnd signal ground * (return) a3 scl i2c clock signal line b3 sda i2c data signal line c3 smb_alert_l smb alert signal output: active low d3 ishr_bus v1 current share bus a4 eeprom_wp eeprom write protect b4 rsvd reserved c4 v1_sns_r main output negative sense d4 v1_sns main output positive sense a5 vsb standby positive output b5 vsb standby positive output c5 vsb_r standby ground * d5 vsb_r standby ground * note: * these pins should be connected to sgnd on the system. see section 7 for pull - up resistor settings of signal pins - all si gnal pins are referred to sgnd. table 8 . output connector pinout 14.2 out put connector pinout
24 pff 3000 - 12 - 069r d tech.support@psbel.com see also spspff3 - 01 datasheet bdc.00887 the recommended pin configuration below is based on companys own shelf design and provided here as reference. customer pin lengths within the range indicated is acceptable .
pff 3000 - 12 - 069r d 25 asia - pacific +86 755 298 85888 europe, middle east +353 61 225 977 north america +1 408 785 5200 ? 201 8 bel power solutions & protection bcd.00886_011 item description ordering p n source i 2 c utility windows vista/7/8 compatible gui to program, control and monitor pfe front - ends (and other i 2 c units) n/a belfuse.com/power - solutions rev description psu product version date author 008 first release version jan - 2018 rk/ms 011 product p hoto updated; output and protection table update ; added eeprom and pmbus protocol chapters ; general unification with pfe3000 product mar - 2018 rk/ms nuclear and medical applications - products are not designed or intended for use as critical components in life support systems, equipment used in hazardous environments, or nuclear control systems. technical revisions - the appear ance of products, including safety agency certifications pictured on labels, may change depending on the date manufactured. specifications are su bject to change without notice. document number description bca.00447 pff3000 - 12 - 069rd installation instruction bca.00216 pff3000 - 12 - 069rd pmbus? communication manual bcd.00887 power shelf spspff3 - 01g datasheet bcd.00820 nac2006 - 01 datasheet

▲Up To Search▲

Price & Availability of PFF3000-12-069RD

	To Download PFF3000-12-069RD Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .